Execution speed doubled
アポロ精工 アポロ精工 新横浜オフィス（旧ケーアイテクノロジー/旧市川ソフトラボラトリー）
Unlike what one might imagine, this is not a story to be proud of. I present this as "a raw column from the development field." When accelerating the processing speed of image processing, a little technique is to use continuous address access. This is coding that takes into account the fact that the access speed of DRAM differs depending on changes in Row Address and Column Address. In a certain image processing task (for the sake of simplicity), a less experienced team member was developing a process that involved performing horizontal integration followed immediately by vertical integration. Since the reported processing time was slow, I asked whether they were aware of the processing order mentioned above, and what would happen to the processing time if they deliberately reversed the order. The result was that the processing time was the same for both orders. However, when I asked them to report the individual processing times, it was reported that the processing done later was twice as fast. By this point, you may have seen the "punchline." It became clear that coding with an awareness of addresses was less important than the fact that, regardless of the order, the later processing hit the cache, resulting in faster execution. This is a real case. *News is distributed through our company newsletter.
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