[Image Processing Engineer Column] Circuit Scale
アポロ精工 アポロ精工 新横浜オフィス（旧ケーアイテクノロジー/旧市川ソフトラボラトリー）
The capacity of the human brain does not seem to be increasing like the evolution of semiconductors. While reminiscing about the past is a step towards decline, please allow me to do so for the sake of discussing the evolution of semiconductors. The evolution of semiconductors has often been said to have reached its limits in terms of gate scale due to various reasons, such as "the limits of (exposure) light wavelengths," yet we have overcome these challenges time and again. Human wisdom knows no bounds, and I reflect on this. When I first designed an ASIC, the maximum scale was around 3,000 gates. In the design rooms of semiconductor manufacturers, we couldn't proceed with the drawings until we achieved a circuit operation verification rate (the ratio of places that changed between Hi and Lo to those that never changed) of 95% using "test patterns." Now, even FPGAs are said to have "50 million ASIC gates," which is on a completely different scale. Even though the capacity of the human brain has increased, it is not possible for one person to design such large-scale systems alone. The increase in scale has benefited from the incorporation of dedicated circuits, embedded memory, hard-core CPUs, and so on. Using IP provided by device manufacturers becomes, in a sense, a black box. This has turned into a discussion of difficult challenges. *News is distributed through our company newsletter.
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