MIPI CSI-2 Receiver IP Core
Helps connect MIPI sensors from various vendors to FPGA!
We offer the 'MIPI CSI-2 Receiver IP Core', which allows for easy camera design. It is provided as encrypted VHDL, and the VHDL source code is available as an option. Additionally, the MIPI CSI-2 receiver IP software library is provided as an object file, with the option to obtain it as C source code. 【Features】 ■ Compatible with AMD Artix7, Kintex7, Zynq7, and Ultrascale+ FPGAs ■ Comes with a complete reference design for S2I's MVDK equipped with Zynq7 or Ultrascale+ FPGA and IMX MIPI FMC module ■ Easy to port designs to other FPGA platforms *For more details, please download the PDF or feel free to contact us.
basic information
【Specifications】 ■ MIPI CSI-2 receiver and decoding block ■ Configurable number of MIPI lanes ■ Utilizes AMD D-PHY IP ■ Provided as a practical reference design to enable rapid development * For more details, please download the PDF or feel free to contact us.
Price range
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Applications/Examples of results
【Purpose】 ■Develop and commercialize original embedded products for our company *For more details, please download the PDF or feel free to contact us.
