SATA Host APP for FPGA and ASIC IP Cores
Equipped with a self-test! Supports power modes (partial/slumber).
We would like to introduce our "SATA Host APP IP Core for FPGA and ASIC." This is an IP core for SATA hosts that complies with the SATA 3.3 standard and supports a maximum transfer rate of 6Gbps (600MB/s). It consists of the PHY layer, LNK layer, TRN (Transport) layer, application layer, SerDes, and FIFO interface. 【Specifications】 ■ Complies with SATA Revision 3.3 standard (1.5Gbps, 3.0Gbps, 6.0Gbps) ■ Supports OOB (Out of Band) ■ Uses FIFO for the DATA interface ■ Supports either SerDes, PIPE, or SAPIS interfaces ■ Supports power modes (partial/slumber) ■ Equipped with self-test functionality *For more details, please download the PDF or feel free to contact us.
basic information
【Provided Items】 ■Encrypted RTL code or Verilog HDL source code ■Reference design (peripheral circuits, sample software) ■Timing constraint file ■User manual ■Test bench (supports only ModelSIM and Xsim) *For more details, please download the PDF or feel free to contact us.
Price range
Delivery Time
Model number/Brand name
SATA Host APP・IntelliProp
Applications/Examples of results
For more details, please download the PDF or feel free to contact us.
