Intermediate/Advanced: Case Study on Building a UVM Verification Environment for RISC-V Cores
We will introduce our achievements in building a UVM verification environment targeted at customer-designed RISC-V cores. We will provide a detailed explanation from UVM-compatible examples to reuse at higher levels.
This document is a technical material introducing our achievements in building UVM verification environments at our company. It presents an example of the verification environment when validating a customer-designed RISC-V core at Vtech. 【Contents (partial)】 ■ Example of minimal UVM compliance ■ Example of UVM verification environment for RISC-V core ■ Reuse at higher levels of the verification environment, etc. *For more details, please download the PDF or feel free to contact us.
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Vtech is a unique technology company specialized in the "verification" of LSI. Utilizing the technology accumulated from a wide variety of LSI verification projects, we also engage in research, development, and sales of our own products. Furthermore, we provide excellent products and services related to verification from around the world to our customers as an agent. We will continue to focus on verification, pursue it, and aim for our customers worldwide to incorporate "high quality" into their products.