The newly released SMARC module specification revision 2.1 will be the first open AIoM (AI on Module) specification.
ADLINKジャパン 東京本社
ADLINK Technology, one of the main contributors to the SMARC SGET committee, has announced the release of the SMARC module revision 2.1. The SGET (Standardization Group for Embedded Technologies) has just introduced the latest future-proof specification 2.1. The new features are only additional items that do not affect the multiplexing of existing signals and the pins of the edge connector assigned in the 2.0 specification, making the specification fully backward compatible with the current specification 2.0. The main additions are as follows: - Anticipating the needs of the AI and robotics markets, support for up to four MIPI CSI ports - Expansion of Ethernet ports through multiplexing of SERDES signals on the third and fourth PCIe x1 interfaces - Various minor additions for initially unused pins such as plus 2 GPIO pins and PCIe clock request signals
